发明名称 Network switch memory interface configuration
摘要 A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first internal memory communicating with the first data port interface, the second data port interface, and the third data port interface. A first memory management unit having an external memory interface for communicating data from at least one of the first data port interfaces and the second data port interface to and from an external memory is also provided. A second internal memory is provided, the second internal memory communicating with the third data port interface. A second memory management unit is provided and used to control access to and from the second internal memory. A communication channel is provided for communicating data and messaging information between the first data port interface, the second data port interface, the third data port interface, the first internal memory, and the first memory management unit. The first memory management unit directs data from one of the first data ports, the second data ports, and the third data ports to one of the internal memory and the external memory interfaces according to a predetermined algorithm.
申请公布号 US2004174898(A1) 申请公布日期 2004.09.09
申请号 US20040799695 申请日期 2004.03.15
申请人 BROADCOM CORPORATION 发明人 KADAMBI SHIRI;AMBE SHEKHAR
分类号 H04L12/18;H04L12/42;H04L12/46;H04L12/56;H04L29/06;H04L29/08;(IPC1-7):H04L12/66 主分类号 H04L12/18
代理机构 代理人
主权项
地址