发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device of multilayer interconnection, which effectively prevents short circuit between interconnections when embedded, prevents polish remnants of a conductive material from remaining in forming the embedded interconnections, and prevents deterioration in the dimensional accuracy of an interconnection width, or the like. SOLUTION: In forming a contact plug 3 through chemical mechanical polishing of a first interlayer insulating film 4 and the conductive material, the method comprises steps of performing chemical mechanical polishing wherein polishing of the conductive material has a priority, performing chemical mechanical polishing wherein polishing of the first interlayer insulating film has a priority, and performing chemical mechanical polishing wherein polishing of the conductive material has a priority. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004253584(A) 申请公布日期 2004.09.09
申请号 JP20030042008 申请日期 2003.02.20
申请人 RENESAS TECHNOLOGY CORP 发明人 SEIHIKARI TAKESHI;FUJII YASUHISA;TAKEWAKA HIROMOTO
分类号 H01L21/3205;H01L21/304;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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