发明名称 ROUNDING PROCESSING DEVICE OF NUMERICAL COPROCESSOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a rounding processing device for a numerical coprocessor capable of creating the magnitude relation between the magnitude of a rounding error and an operation result as a rounding error, further converting the rounding error to a floating point format so as to be smoothly usable for an operation to be successively performed. <P>SOLUTION: This rounding processing device for a numerical coprocessor comprises a rounding error creation part 17 for determining the difference between a mantissa b (S17) before rounding and a mantissa d after rounding (S22) in the rounding part 10 of the numerical coprocessor 3, and generating a rounding error S23 having the sign and magnitude of the rounding error; and a rounding error storage part 18 for storing the rounding error generated by the creation part 17, which is controlled by an operation part strobe bus S21 so as to enable a host processor to read the stored rounding error at an optional point of time through an internal data bus S4. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004252554(A) 申请公布日期 2004.09.09
申请号 JP20030039702 申请日期 2003.02.18
申请人 YASKAWA ELECTRIC CORP 发明人 KASHIWAGI YOSHITAKA
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
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