| 摘要 |
<P>PROBLEM TO BE SOLVED: To make the demodulation process of the address information to be recorded by phase modulation efficient. <P>SOLUTION: By the decoding device 11, till an analog PLL (phase locked loop) circuit 13 is locked, the address information ADD is demodulated from a phase inversion pattern of an ADIP detected on the basis of a 1st clock Dpck to be produced by a digital PLL circuit 12. Then, after the analog PLL circuit 13 is locked, the address information ADD is demodulated from a phase inversion pattern of an ADIP detected on the basis of a 2nd clock Apck to be produced by the analog PLL circuit 13. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
