SEMICONDUCTOR MEMORY DEVICE, ESPECIALLY INCLUDING READ CONTROL CIRCUIT, SENSE AMPLIFIER CIRCUIT, LATCH CIRCUIT, DETECTION CIRCUIT AND DATA OUTPUT BUFFER CIRCUIT

摘要

PURPOSE: A semiconductor memory device is provided to improve yield and to prevent operation error due to power noise while outputting data. CONSTITUTION: According to the semiconductor memory device, a read control circuit(190) generates a precharge signal and a discharge signal and a read enable signal during data read operation in response to a summator signal. A sense amplifier circuit(130) discharges bit lines of a memory cell array in response to the discharge signal and precharges a bit line of a selected column in response to the precharge signal during the data read operation, and then senses/amplifies cell data stored in a memory cell selected by selection circuits. A latch circuit(140) transfers data from the sense amplifier circuit to a data line corresponding to the selected bit line, and latches the data. A detection circuit(230) generates the first and the second pulse signals to enable the latch circuit during the data read operation, and disables the latch circuit by inverting the first and the second pulse signals by detecting transition of the read enable signal. And a data output buffer circuit(150) outputs data on the data line to the external in response to the read enable signal.