发明名称 |
Double-gate vertical MOSFET transistor and fabrication method |
摘要 |
A double-gate vertical MOSFET transistor is described along with an associated fabrication method. The MOSFET transistor is configured with separate gates on each side of a vertical source-drain channel that is capped by an insulation layer. The fabrication process generally comprises forming a silicon-insulator stack having a silicon fin (channel) capped with insulation. The opposing ends of the silicon-insulator stack being configured with areas capable of receiving source and drain contacts. The vertical surfaces of the silicon fin are insulated prior to the formation of gate electrodes adjacent the two opposing sides of the silicon-insulator stack. By way of example, the gate electrodes are formed by depositing a thick layer of conductive gate material over the substrate and then removing the adjoining upper portion, such as by polishing. Portions of each gate electrode are configured with areas capable of receiving a gate contact.
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申请公布号 |
US6787402(B1) |
申请公布日期 |
2004.09.07 |
申请号 |
US20010845604 |
申请日期 |
2001.04.27 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
YU BIN |
分类号 |
H01L21/336;H01L29/786;(IPC1-7):H01L21/355;H01L21/00 |
主分类号 |
H01L21/336 |
代理机构 |
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