发明名称 Test assembly for integrated circuit package
摘要 A test assembly for an integrated circuit package includes a package substrate and a test board. The package substrate is provided with a plurality of first contact pads linked in a first daisy chain pattern. The test board has a plurality of second contact pads linked in a second daisy chain pattern and a plurality of test pads. All of the second contact pads are divided into a plurality of groups each connected to one pair of test pads. All of the second contact pads in any group are arranged in a line. The present invention further provides a method of testing an integrated circuit package utilizing the aforementioned package substrate and test board.
申请公布号 US6788092(B2) 申请公布日期 2004.09.07
申请号 US20020121650 申请日期 2002.04.15
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 CHENG PO JEN;LEE CHIU WEN;LEE JIN ZHU;KUNG HENG YU
分类号 G01R1/04;G01R31/305;(IPC1-7):G01R31/26 主分类号 G01R1/04
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