发明名称 |
Method using planarizing gate material to improve gate critical dimension in semiconductor devices |
摘要 |
A method of manufacturing a semiconductor device may include forming a fin structure on an insulator. The fin structure may include side surfaces and a top surface. The method may also include depositing a gate material over the fin structure and planarizing the deposited gate material. An antireflective coating may be deposited on the planarized gate material, and a gate structure may be formed out of the planarized gate material using the antireflective coating.
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申请公布号 |
US6787439(B2) |
申请公布日期 |
2004.09.07 |
申请号 |
US20020290276 |
申请日期 |
2002.11.08 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
AHMED SHIBLY S.;TABERY CYRUS E.;WANG HAIHONG;YU BIN |
分类号 |
H01L21/336;H01L29/423;(IPC1-7):H01L21/320;H01L21/476;H01L21/823 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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