发明名称 Processor reset and instruction fetches
摘要 In one embodiment, a method is disclosed for holding instruction fetch requests of a processor in an extended reset. Fetch requests are disabled when the processor undergoes a reset. When the reset is completed, fetch requests remain disabled when the instruction memory is being loaded. When loading of the instruction memory is completed, fetch requests are enabled.
申请公布号 US6789187(B2) 申请公布日期 2004.09.07
申请号 US20000738082 申请日期 2000.12.15
申请人 INTEL CORPORATION;ANALOG DEVICES, INC. 发明人 SINGH RAVI P.;ROTH CHARLES P.;KOLAGOTLA RAVI;REVILLA JUAN G.
分类号 G06F1/24;G06F9/38;(IPC1-7):G06F15/177;G06F12/00 主分类号 G06F1/24
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