发明名称 Wafer-level inter-connector formation method
摘要 Inter-connectors are typically used for interconnecting electronic components. Interconnections between electronic components are generally classified into at least two broad categories of "relatively permanent" and "readily demountable". A "readily demountable" connector includes a spring-like contact structure of one electronic component for connecting to a terminal of another electronic component. The spring-like contact structure, also known as an inter-connector, generally requires a certain amount of contact force to effect reliable pressure contact to a terminal of an electronic component. Therefore, the shape and metallurgy of the inter-connector are important factors in determining the effectiveness of the inter-connector for making pressure connection to a terminal of the electronic component. Conventional methods of making such an inter-connector use lithographic and planarisation methods to "make" the inter-connectors in segments. This results in the inter-connector segments having joints therebetween. Metallurgically, the joint stress due to joining a pair of inter-connector segments and stress concentration at the joints due forces applied to the inter-connector can lead to the mechanical failure of the inter-connector in Mathieu. An embodiment of the invention uses lithographic techniques and heat treatment methods for forming a structure channel defining the shape and dimension of an inter-connector. The structure channel is then used to "mold" a reproduction of the inter-connector having a single continuous physical segment.
申请公布号 US6787456(B1) 申请公布日期 2004.09.07
申请号 US20030392084 申请日期 2003.03.20
申请人 AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH 发明人 KRIPESH VAIDYANATHAN;IYER MAHADEVAN K;NAGARAJAN RANGANATHAN
分类号 H01L21/48;(IPC1-7):H01L21/476;H01L21/311;H01L21/31;H01L21/469;H01L21/26 主分类号 H01L21/48
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