| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a timing error detection circuit capable of performing detection with high accuracy with a simple configuration in order to realize timing compensation in a digital quadrature demodulator composed by using a plurality of A/D converters. <P>SOLUTION: This timing error detection circuit comprises square arithmetic circuit 411 and 410 for receiving respective outputs of low pass filters 600 and 601 for receiving outputs of same phase and orthogonal channels, an addition circuit 412 for adding outputs of the square arithmetic circuits 411 and 410, a code inversion circuit 420 for inverting an output of the addition circuit 412, a selection circuit 430 for selecting the output of the addition circuit 412 when two inputs from the low pass filters 600 and 601 are the same code and an output of the code inversion circuit 420 when the inputs are different codes, an integrating circuit 440 for integrating an output of the selection circuit 430 in a section where an external control signal 40 is valid and initializing the output when the external control signal 40 becomes invalid, a register circuit 450 for holding an output of the integrating circuit 440 just before initialization when the external control signal 40 is switched from valid to invalid, a low pass filter 500 for smoothing an output of the register circuit and a scaling circuit 510 for applying proper scaling to an output of the low pass filter 500. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
