发明名称 SELECTIVELY UNMARKING LOAD-MARKED CACHE LINES DURING TRANSACTIONAL PROGRAM EXECUTION
摘要 One embodiment of the present invention provides a system that facilitates selectively unmarking load-marked cache lines during transactional program execution, wherein load-marked cache lines are monitored during transactional execution to detect interfering accesses from other threads. During operation, the system encounters a release instruction during transactional execution of a block of instructions. In response to the release instruction, the system modifies the state of cache lines, which are specially load-marked to indicate they can be released from monitoring, to account for the release instruction being encountered. In doing so, the system can potentially cause the specially load-marked cache lines to become unmarked. In a variation on this embodiment, upon encountering a commit-and­startnew-transaction instruction, the system modifies load-marked cache lines to account for the commit-and-start­new-transaction instruction being encountered. In doing so, the system causes normally load-marked cache lines to become unmarked, while other specially load-marked cache lines may remain load-marked past the commit-and­startnew-transaction instruction.
申请公布号 WO2004075046(A2) 申请公布日期 2004.09.02
申请号 WO2004US03668 申请日期 2004.02.06
申请人 SUN MICROSYSTEMS INC.;TREMBLAY, MARC;JACOBSON, QUINN A.;CHAUDHRY, SHAILDENDER;MOIR, MARK S.;HERLIHY, MAURICE P. 发明人 TREMBLAY, MARC;JACOBSON, QUINN A.;CHAUDHRY, SHAILDENDER;MOIR, MARK S.;HERLIHY, MAURICE P.
分类号 G06F9/30;G06F9/312;G06F9/38;G06F9/46;G06F12/08 主分类号 G06F9/30
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