Substrate illumination method with a structural pattern that compensates for the optical proximity effect, for use in semiconductor manufacture wherein serif lengths are reduced by a specified amount

摘要

Method in which a circuit layout is provided with a first structure pattern (200) that is stored in electronic data format and represents a first lithographic plane. A first partial surface (70) is defined as a lower threshold (21) for the length (10) by which a serif (151, 152) to be attached to a structure element (2a, 2b) can fall below a specified value in order to increase the local resolution.