发明名称 |
Delay-locked loop circuit for periodic input signal phase matching has filter stage that only alters filtered phase signal state if different state detected for defined number of successive cycles |
摘要 |
<p>The delay-locked loop or DLL circuit (1) has a regulating unit (3) with a filter stage (8) for providing a filtered phase signal (FP) to the regulating unit during a transient phase, whereby the filter stage only alters the state of the filtered phase signal if a different state of the phase signal (P) is detected relative to the filtered phase signal for a defined number of successive signal cycles. An independent claim is also included for the following: (a) a method of phase matching of a periodic input signal.</p> |
申请公布号 |
DE10306619(A1) |
申请公布日期 |
2004.09.02 |
申请号 |
DE2003106619 |
申请日期 |
2003.02.18 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
KNUEPFER BERNHARD |
分类号 |
H03L7/081;H03L7/093;(IPC1-7):H03L7/081 |
主分类号 |
H03L7/081 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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