发明名称 INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To realize high-speed inter-process communication even while using a thread in a process operating in a composite machine. <P>SOLUTION: This integrated circuit accessing a function circuit executing prescribed operation by an instruction from a processor has: an address decoder 200 selecting the accessed function circuit on the basis of an input/output address of a register of the function circuit specified from the processor; an address mask unit 401 connected to a function circuit except the function circuit selected by the address decoder 200, stopping supply of an address signal to an address bus; a data mask unit 402 stopping supply of a data signal to a data bus; and a clock mask unit 403 stopping supply of a register clock signal to a clock bus. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004246808(A) 申请公布日期 2004.09.02
申请号 JP20030038516 申请日期 2003.02.17
申请人 FUJITSU LTD 发明人 MYOGA NOBUYUKI;SUGAWARA HIROHIDE
分类号 G06F3/06;G06F1/04;G11B20/10;(IPC1-7):G06F1/04 主分类号 G06F3/06
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