INPUT/OUTPUT DATA PIPE LINE CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE, IN WHICH CONTROL AND SWITCHIG SIGNAL IS USED TO CONTROL THE DEVICE

摘要

PURPOSE: An input/output data pipe line circuit of a semiconductor memory device is provided which generates a control signal from a clock signal of the memory device and is controlled by a logic state of the control signal. CONSTITUTION: According to the input/output data pipe line circuit(2000) of a semiconductor memory device, the first transmission part(210) receives data stored in a memory cell and transmits the data to an input/output driver in response to the first and the second switching signal(WRTPIPE,LOAD). A control signal generation part(230) receives a clock of the semiconductor memory device, and outputs a control signal corresponding to a frequency of the clock and the first and the second switching signal. The second transmission part(220) transmits the data to the input/output driver in response to the control signal. The first transmission part and the second transmission part are enabled selectively each other.