发明名称 Voltage regulation system for a multibit programming of a reduced integration area non volatile memory
摘要 The invention relates to a voltage regulation system for multiword programming in non volatile memories, for example of the Flash type, with low circuit area occupation, wherein memories comprise at least a memory cell matrix (5) organised in cell rows and columns and with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content. Memory cells have drain terminals (D) connected to matrix columns and biased in the programming step with a predetermined voltage value by means of program load circuits (2) associated to each matrix column; advantageously, the invention provides, in parallel with each program load circuit (2), a conduction-to-ground path (9) enabled by a controlled active element (10). <IMAGE>
申请公布号 EP1453057(A1) 申请公布日期 2004.09.01
申请号 EP20030425133 申请日期 2003.02.28
申请人 STMICROELECTRONICS S.R.L. 发明人 MARTINES, IGNAZIO;SCARDACI, MASSIMO
分类号 G11C11/56;G11C16/12;(IPC1-7):G11C11/56 主分类号 G11C11/56
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