发明名称 |
Read/write alignment scheme for port reduction of multi-port SRAM cells |
摘要 |
A considerable amount of area can be saved according to the present invention by reducing the number of input ports and the number of output ports to the number n of concurrently intended array accesses. This remarkable reduction of ports and thus an extraordinary associated area saving can be achieved when some knowledge about array utilization is exploited: The array accesses are to be performed with concurrent accesses from at most k particular groups. A group is defined by a plurality of array accesses which have at most one access to the same port at a time. Then, for reading the read results are aligned according to a simple re-wiring scheme to the respective read requesters, whereas for writing the accesses are aligned prior to the array access according to the same or a similar scheme.
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申请公布号 |
US6785781(B2) |
申请公布日期 |
2004.08.31 |
申请号 |
US20010825072 |
申请日期 |
2001.04.03 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
LEENSTRA JENS;PILLE JUERGEN;SAUTTER ROLF;WENDEL DIETER |
分类号 |
G06F9/38;G11C8/16;(IPC1-7):G06F12/00 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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