发明名称 LOW-POWER BUS INTERFACE
摘要 A system is configured to disable the bus interface of target devices during periods of inactivity on a bus. A bus controller processes data and control signals from an initiator to establish an initiator-to-target communications path for data-transfer to or from the initiator. At the same time that the bus controller is processing the data and control signals, an activity detector notes the occurrence of the request from the initiator, and enables the bus interface on each of the targets. When the target signals a completion of the data-transfer operation, the activity detector notes the occurrence of the completion signal from target and disables the target interfaces of each target. To provide a substantial reduction in power consumption, the enabling and disabling of the target interfaces is effected by controlling the propagation of the clock system clock to each target interface. The single activity detector is continually active, to detect each data-transfer initiation as it occurs, and effectively eliminates the need for each of the individual target bus interfaces to perform this continual monitoring function.
申请公布号 KR20040076281(A) 申请公布日期 2004.08.31
申请号 KR20047011018 申请日期 2003.01.15
申请人 发明人
分类号 G06F1/26;G06F12/00;G06F1/32;G06F13/16;G06F13/36;G06F13/42 主分类号 G06F1/26
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