| 摘要 |
PROBLEM TO BE SOLVED: To provide an image processor and image processing method capable of performing an extremely short-time and low-power consumption image processing with a relatively simple device structure without waste. SOLUTION: This image processor comprises SRAM A, B, C and D constituted so as to be capable of holding pixel data of every small block of each large block, for example, a small block A<SB>ij</SB>in SRAM A, and simultaneously reading, by designation of one address to each small block, a plurality of pixel datal in the small block concerned; a coefficient string controller 12 and addition part 13 having a coefficient string consisting of a plurality of coefficients arranged in matrix, and determining the total sum by multiplying the coefficients by the respectively corresponding pixel data. The pixel data of each small block constituting a certain large block read from the SRAM A, B, C and D are multiplied by the coefficient string rearranged in a predetermined order. COPYRIGHT: (C)2004,JPO&NCIPI |
