发明名称 TEST CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a test circuit having a simple circuit constitution and capable of easily improving the efficiency of test development. <P>SOLUTION: In a test for accessing an external storage device 200, some of pins 10 function as a bus pin. In parallel with program execution, data to be outputted are stored in an exclusive register 9. In the timing that a bus 5 is not in an operating state, a BIU 8 generates a cut-off signal and an output permission signal from a bus operation monitor signal. The cut-off signal cuts off individual devices from the bus 5, stops the program operation of a CPU 1 and stops the data transfer of the external storage device 200. The output permission signal outputs a data signal stored in the exclusive register 9 to the bus 5 and switches the function of the pin 10 of a port circuit 6 from a bus pin to an I/O pin. The data signal stored in the exclusive register 9 is outputted from the I/O pin through the bus 5. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004240810(A) 申请公布日期 2004.08.26
申请号 JP20030030561 申请日期 2003.02.07
申请人 RENESAS TECHNOLOGY CORP;RENESAS LSI DESIGN CORP 发明人 MIYATA TAKAHIRO
分类号 G06F11/22;G06F15/78 主分类号 G06F11/22
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