发明名称 ELECTRONIC PACKAGE CORRECTION PROCESS
摘要 PROBLEM TO BE SOLVED: To provide a multilayer ceramic correction process which forms a new electric correction path for connecting top vias. SOLUTION: A correction path 65 is provided between a defect net 40 and a redundancy correction net 45 in a multilayer ceramic substrate. The defect net and the correction net are terminated at top vias 41 and 46 of the substrate. The defect net is electrically isolated from an electric correction structure by the use of laser, and a post-burning circuit is formed on and in the substrate. In addition, the passivation of an electric correction line 65 is performed. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004241771(A) 申请公布日期 2004.08.26
申请号 JP20040020523 申请日期 2004.01.28
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 CASEY JON A;BALZ JAMES G;BERGER MICHAEL;COHEN JEROME;HENDRICKS CHARLES;INDYK RICHARD;LAPLANTE MARK;LONG DAVID C;MAIORINO LORI A;MERRYMAN ARTHUR G;POMERANTZ GLENN A;RITA ROBERT A;SEMKOW KRYSTYNA W;SPENCER PATRICK E;SUNDLOF BRIAN R;SURPRENANT RICHARD P;WALL DONALD R;WASSICK THOMAS A;WILEY KATHLEEN M
分类号 H05K3/46;H01L21/48;H01L23/12;H01L23/498;H05K1/03;H05K3/00;H05K3/22;(IPC1-7):H05K3/46 主分类号 H05K3/46
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