| 摘要 |
Semiconductor wafer having an upper side, semiconductor chip positions with integrated circuits for first chips (4), central region (5) and an edge region (7) with their contact surfaces (6) and (8) respectively, connected via conduction paths (9)(sic), second chips (10), with their contact surfaces (11), located on the central regions (5) of chips (4), and an equalizing layer (12) on the upper side with second chips (10) embedded in it. Independent claims are included for: (1) Nutzen (sic), (2) an electronic component with first and second chips, (3) a device with a polyimide equalizing layer, (4) a process for preparation of the wafer, (5) a process for preparation of the Nutzen (sic), (6) a process for preparation of the electronic component. |
