发明名称 METHOD OF MANUFACTURING HIGH COUPLING RATIO FLASH MEMORY HAVING SIDEWALL SPACER FLOATING GATE ELECTRODE
摘要 A method of manufacturing a flash memory is provided. First, a substrate with a first gate structure and a second gate structure thereon is provided. The first gate structure and the second gate structure each comprises of a dielectric layer, a first conductive layer and a cap layer. A tunneling oxide layer is formed over the substrate and then a first spacer is formed on the sidewall of the first conductive layer. Thereafter, a second conductive layer is formed on one side designated for forming a source region of the sidewalls of the first gate structure and the second gate structure. Then, the source region is formed in the substrate in the designated area. Next, an inter-gate dielectric layer is formed over the second conductive layer and then an insulating layer is formed over the source region. After forming a third conductive layer over the area between the first gate structure and the second gate structure, a drain region is formed in the substrate.
申请公布号 US2004166641(A1) 申请公布日期 2004.08.26
申请号 US20030248867 申请日期 2003.02.26
申请人 HUNG CHIH-WEI;HSU CHENG-YUAN;SUNG DA 发明人 HUNG CHIH-WEI;HSU CHENG-YUAN;SUNG DA
分类号 H01L21/8247;H01L27/115;(IPC1-7):H01L21/823;H01L21/336 主分类号 H01L21/8247
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