Pre-drive circuit, capacitive load drive circuit and plasma display apparatus

摘要

A pre-drive circuit having low deviation of timing of a high level and a low level output voltages is disclosed. A plurality of drive systems are comprised, each having an input amplifier circuits (41,44) for amplifying input voltages input to input voltage terminals (33,34), high level shift circuits (42,25) for shifting signal levels output from the input amplifier circuits (41,44), and output amplifier circuits (43,46) for amplifying shift signals output from the high level shift circuits (42,45), and each drive system has the same constitution.