发明名称 Semiconductor memory device allowing mounting of built-in self test circuit without addition of interface specification
摘要 In the semiconductor memory device, a control circuit generates various commands for a memory cell array according to an internal command control signal and an internal address signal output from an input switching circuit for switching an input source of the command control signals and the address signal between an external terminal and a BIST circuit. In the BIST mode, the input switching circuit cuts the signal input from the external terminal and generates the internal command control signal and the internal address signal according to an output signal from the BIST circuit. Transition to the BIST mode and return to the normal operation mode are indicated by a combination of signals supplied to the external terminal. Therefore, an interface between a built in BIST circuit and other internal circuits can be secured without an addition of a special interface specification.
申请公布号 US6782498(B2) 申请公布日期 2004.08.24
申请号 US20010758042 申请日期 2001.01.11
申请人 RENESAS TECHNOLOGY CORP. 发明人 TANIZAKI TETSUSHI;HAMAMOTO TAKESHI
分类号 G01R31/28;G11C29/12;G11C29/14;G11C29/46;G11C29/48;(IPC1-7):G11C29/00;G11C7/00 主分类号 G01R31/28
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