发明名称 Semiconductor integrated circuit device and method of manufacturing the same
摘要 Provided is a manufacturing method of a semiconductor integrated circuit device having a plurality of first MISFETs in a first region and a plurality of second MISFETs in a second region, which comprises forming a first insulating film between two adjacent regions of the first MISFET forming regions in the first region and the second MISFET forming regions in the second region; forming a second insulating film over the surface of the semiconductor substrate between the first insulating films in each of the first and second regions; depositing a third insulating film over the second insulating film; forming a first conductive film over the third insulating film in the second region; forming, after removal of the third and second insulating films from the first region, a fourth insulating film over the surface of the semiconductor substrate in the first region; and forming a second conductive film over the fourth insulating film; wherein the third insulating film remains over the first insulating film in the second region. The present invention makes it possible to raise the threshold voltage of a parasitic MOS and in addition, to suppress occurrence of an NBT phenomenon.
申请公布号 US6780717(B2) 申请公布日期 2004.08.24
申请号 US20010989061 申请日期 2001.11.21
申请人 RENESAS TECHNOLOGY CORP.;HITACHI DEVICE ENGINEERING CO., LTD. 发明人 YASUOKA HIDEKI;KOUKETSU MASAMI;ISHIDA SUSUMU;SAITOU KAZUNARI
分类号 G02F1/136;G02F1/1368;H01L21/76;H01L21/762;H01L21/8234;H01L21/8238;H01L27/06;H01L27/08;H01L27/088;H01L27/092;H01L27/10;H01L29/78;(IPC1-7):H01L21/823;H01L21/823;H01L21/336 主分类号 G02F1/136
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