发明名称 |
Semiconductor memory device and test method therof |
摘要 |
A semiconductor memory device employs a power supply system in which a first power supply voltage supplied to a cell area is separated from a second power supply voltage supplied to a peripheral circuit area. Particularly, during a wafer burn-in test operation mode, the first power supply voltage supplied to the cell area is higher than the second power supply voltage supplied to the peripheral circuit area. If a wafer burn-in test operation is performed under the second power supply system, a DC current path formed by a latch-up phenomenon of a memory cell can be shut off.
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申请公布号 |
US6781899(B2) |
申请公布日期 |
2004.08.24 |
申请号 |
US20020202272 |
申请日期 |
2002.07.24 |
申请人 |
SAMSUNG ELECTRONICS, CO., LTD |
发明人 |
HAN GONG-HEUM;KWAK CHOONG-KEUN;NAM HYOU-YOUN |
分类号 |
G01R31/30;G01R31/28;G11C11/413;G11C29/00;G11C29/06;G11C29/12;H01L21/8244;H01L27/10;H01L27/11;(IPC1-7):G11C29/00;G11C7/00 |
主分类号 |
G01R31/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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