| 摘要 |
A method and a device generate a reference voltage for discriminating between the logic states of a data signal received at a receiving end. A transmitting device transmits a continuous clock signal with a constant pulse period duration and a symmetrical sequence of low and high clock signal states in such a way that, at the receiver end, the clock signal has the same low and high voltage levels as the received data signal and it is subject to the same system-governed variations as the received data signal. An integrator at the receiver end receives and integrates the clock signal, and the integrated value becomes the reference voltage for the receiver unit.
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