发明名称 PRINTED BOARD EVALUATION SUPPORTING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a printed board evaluation supporting system capable of evaluating the configuration of a build-up substrate on the basis of information obtained at the initial stages of framework design and circuit design. SOLUTION: The printed board evaluation supporting system is constituted of an all-component number-of-pin pairs setting part for setting the number of pin pairs between main IC components which is reference information in circuit design, a circuit inference part for inferring a circuit scale, a board size setting part for setting the size of a printed board, the number of layers and the sorts of the layers, a wiring parameter setting part for setting wiring parameters on the printed board, and an evaluation part for evaluating the size of the printed board, the number of layers and the kinds of the layers. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004234309(A) 申请公布日期 2004.08.19
申请号 JP20030021837 申请日期 2003.01.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KOYAMA NOBUYUKI
分类号 G06F17/50;H05K3/00;(IPC1-7):G06F17/50 主分类号 G06F17/50
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