STACKED CHIP ELECTRONIC PACKAGE HAVING LAMINATE CARRIER AND ITS PRODUCING PROCESS

摘要

PROBLEM TO BE SOLVED: To provide a multi-chip electronic package which utilizes an organic laminate chip carrier and a pair of semiconductor chips arranged on an upper surface of the carrier in the stacked orientation.

SOLUTION: The organic laminate chip carrier is composed of a plurality of conductive planes and dielectric layers and one or both chips are coupled to underlying conductors on the bottom surface thereof. The carrier may include a high speed part for assuring high frequency connection between semiconductor chips and may also include an internal capacitor and/or a thermally conductive member for enhancing the operational capabilities. The first chip, e.g. an ASIC chip, is solder bonded to the carrier while the second chip, e.g. a memory chip, is secured to the upper surface of the first chip and coupled to the carrier using a plurality of wirebond connections.

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