发明名称 |
Programmable frequency divider |
摘要 |
A programmable frequency divider capable of a 50% duty cycle at odd and even integer division ratios. In one embodiment, the frequency divider is configured to produce an output signal having a period equal to a division ratio N times a period of a clock signal, and the division number N is a programmable variable which bears the following relationship to the number F of required storage elements: <math-cwu id="MATH-US-00001"> <NUMBER>1</NUMBER> <MATH> <MROW> <MROW> <MI>F</MI> <MO>=</MO> <MFRAC> <MROW> <MI>N</MI> <MO>+</MO> <MI>P</MI> </MROW> <MN>2</MN> </MFRAC> </MROW> <MO>,</MO> </MROW> </MATH> <mathematica-file id="MATHEMATICA-00001" file="US20040160247A1-20040819-M00001.NB"/> <image id="EMI-M00001" wi="216.027" he="17.03835" file="US20040160247A1-20040819-M00001.TIF" imf="TIFF" ti="MF"/> </MATH-CWU> where P is 1 if the division ratio is odd, and 0 if the division ratio is even.
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申请公布号 |
US2004160247(A1) |
申请公布日期 |
2004.08.19 |
申请号 |
US20040779879 |
申请日期 |
2004.02.18 |
申请人 |
MAGOON RAHUL;MOLNAR ALYOSHA C. |
发明人 |
MAGOON RAHUL;MOLNAR ALYOSHA C. |
分类号 |
H03K21/10;H03K23/66;(IPC1-7):H03K3/00 |
主分类号 |
H03K21/10 |
代理机构 |
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