发明名称 JITTER INDUCING CIRCUIT AND METHOD, AND PULSE TRAIN GENERATING CIRCUIT AND METHOD
摘要 PROBLEM TO BE SOLVED: To make inducible an accurate jitter quantity to each edge of a reference pulse train as set. SOLUTION: In first and second delay blocks 16 and 18, each edge of the inputted reference pulse train is delayed just by a set delay time and outputted. Outputs of the first and second delay blocks are composed and outputted by a signal composing circuit 46. A delay time control circuit 44 controls the delay time of each edge in the first and second delay blocks 16 and 18. A switch 14 selectively supplies the reference pulse train to the first or second delay block. An input delay circuit 10 delays the reference pulse stream so that a pulse can arrive at the switch 14 after arriving at a switch control circuit. At such a time, when the pulse is received after a delay time setting circuit 44 sets the delay time to the second delay block 18, the switch control circuit 12 switches a destination to supply the pulse from the switch 14 from the first delay block to the second delay block. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004236279(A) 申请公布日期 2004.08.19
申请号 JP20030076026 申请日期 2003.03.19
申请人 TEKTRONIX INTERNATL SALES GMBH 发明人 TAKAHASHI HISAO;OKUDA HIDEAKI;OMIYA FUJIHIKO;SAKAI RYOICHI;TAKAI TORU
分类号 H03K5/156;G01R29/26;H03K5/12;H03K5/159;(IPC1-7):H03K5/156 主分类号 H03K5/156
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