| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To realize the low-power operation of a microprocessor even in a pipeline stage of instruction decode and a pipeline stage preceding in terms of time without increasing the circuit scale and the decoding time. <P>SOLUTION: An instruction code of each program for executing an instruction has a first instruction set including a flag designating a predicate 301 and one or two or more second instruction sets including control designation information 302, and performs the low-power operation of each control circuit according to an instruction execution control function, so that the low-power operation of the microprocessor is realized by performing control on the pipeline stage of instruction decode and a pipeline stage preceding in terms of time, without increasing the circuit scale and the decoding time. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p> |
