发明名称 High speed routing table learning and lookup
摘要 A switch includes multiple ports, a switching fabric, and a routing table module. The routing table module includes a multi-bank memory structure for maintaining routing information. The routing information enables the switching fabric to route packets between the ports based upon addresses within the packets. Particular implementations include overflow buffers to increase storage locations beyond those provided within the multi-bank memory structure.
申请公布号 US2004160954(A1) 申请公布日期 2004.08.19
申请号 US20040783065 申请日期 2004.02.20
申请人 FUJITSU LIMITED 发明人 SHIMIZU TAKESHI;PATHI SRIDHAR
分类号 H04L12/56;(IPC1-7):H04L12/28 主分类号 H04L12/56
代理机构 代理人
主权项
地址