| 摘要 |
A memory access interface for connecting a memory to a micro-controller having an address/data multiplexing bus and a microprocessor is proposed. The memory access interface includes an address latch, a multiplexer, and a data buffer. The address latch latches and outputs the lower-bit address signal on the address/data multiplexing bus of the micro-controller when an address-latch-enable signal is enabled. The multiplexer receives the lower-bit address signal latched by the address latch, a higher-bit address signal outputted from the micro-controller, and an address signal outputted from the microprocessor and selectively outputs the address signal of the micro-controller or the address signal of the microprocessor as the address signal of the memory according to a first control signal. The data buffer transmits the signal of the data bus of the memory to the address/data multiplexing bus of the micro-controller during a data cycle of the micro-controller, and maintains a high impedance state during an address cycle of the micro-controller.
|
