发明名称 |
Display operation with inserted block clears |
摘要 |
An SLM PWM clocking method, called "jog clear," for generating short bit periods where block data clears (74) are inserted between block data loads (72, 76) within a frame refresh period. The method significantly reduces the short bit duration that requires use of the earlier reset-release method and it eliminates undesirable artifacts present in these earlier SLM clocking methods.
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申请公布号 |
US6778155(B2) |
申请公布日期 |
2004.08.17 |
申请号 |
US20010918837 |
申请日期 |
2001.07.31 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
DOHERTY DONALD B.;HEWLETT GREGORY J. |
分类号 |
G09G3/20;G09G3/34;(IPC1-7):G09G3/34 |
主分类号 |
G09G3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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