发明名称 Method and apparatus for improving throughput of a rules checker logic
摘要 An integrated multiport switch operating in a packet switched network utilizes an internal rules checker (IRC) to process data frames. The IRC employs a modular, pipelined architecture that enables data frames to be processed simultaneously, thereby increasing data throughput.
申请公布号 US6778547(B1) 申请公布日期 2004.08.17
申请号 US19990315849 申请日期 1999.05.21
申请人 ADVANCED MICRO DEVICES, INC. 发明人 MERCHANT SHASHANK C.
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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