发明名称 |
Circuits and methods using vertical, complementary transistors |
摘要 |
A method and structure for an improved, vertically configured inverter array is provided. The inverter includes a buried gate contact coupling the body regions of a complementary pair of transistors. An electrical contact couples the second source/drain regions of the complementary pair of transistors. The transistors are formed in vertical pillars of single crystalline semiconductor material.
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申请公布号 |
US6777744(B2) |
申请公布日期 |
2004.08.17 |
申请号 |
US20010873650 |
申请日期 |
2001.06.04 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
NOBLE WENDELL P. |
分类号 |
H01L21/336;H01L21/8238;H01L27/092;H01L29/76;H01L29/78;H01L29/94;H01L31/119;(IPC1-7):H01L31/119 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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