发明名称 Semiconductor integrated circuit and a burn-in method thereof
摘要 The present invention realizes higher-speed external output operation synchronized with a clock signal from the viewpoint of prevention of output operation delay due to a level shift circuit and maintenance of a high breakdown voltage of an output buffer. A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than a breakdown voltage of the first circuit, and operation voltages of the first and second circuits can be made equal to each other or different from each other. The second circuit has a plurality of level shift circuits capable of shifting the level of an output of the first circuit in accordance with an operation voltage of the second circuit, a plurality of external output buffers receiving outputs of the level shift circuits, bypasses for bypassing an input of a predetermined level shift circuit to an input of a predetermined external output buffer, and a selecting circuit for selecting connection of either the predetermined level shift circuit or a bypass to an input of the predetermined external output buffer. In a use form in which the first and second circuits operate with a low voltage, the bypass is selected. In high-voltage operation and burn-in, the level shift circuits are selected.
申请公布号 US6777997(B2) 申请公布日期 2004.08.17
申请号 US20020309183 申请日期 2002.12.04
申请人 RENESAS TECHNOLOGY CORP.;NORTHERN JAPAN SEMICONDUCTOR TECHNOLOGIES, INC. 发明人 TAHARA SHIGEMITSU;KATAGIRI DAISUKE;SHIMANUKI TAKESHI;OSHIBA MASASHI
分类号 G01R31/30;G01R31/28;G01R31/316;H01L21/822;H01L27/04;H03K19/0175;H03K19/0185;H03L5/00;(IPC1-7):H03L5/00 主分类号 G01R31/30
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