| 摘要 |
PURPOSE: A method for fabricating a mask read-only-memory(ROM) is provided to reduce the resistance of a peripheral circuit region and the resistance of a wordline of a cell region, by forming a high performance peripheral circuit by using a surface channel PMOS, by preventing self-align silicide or salicide from being formed in the cell region and by forming silicide only in the cell region necessitating the silicide. CONSTITUTION: After a buried n-type(BN) region(120) is formed in the cell region of a semiconductor substrate(100) in which the cell region and a peripheral circuit region are defined, a wordline(140) is formed. A gate oxide layer is formed in the peripheral circuit region of the substrate. A poly layer is formed on the substrate including the gate oxide layer. The poly layer and the gate oxide layer are etched back to simultaneously form a spacer on the sidewall of the wordline and a gate line in the peripheral circuit region. An insulation layer(180) is deposited on the substrate including the gate line. The insulation layer is etched back by a dry etch method to form a sidewall spacer of the wordline and a gate line spacer on both sidewalls of the gate line. Ions are implanted into the substrate by using the gate line spacer as an ion implantation mask to form a source/drain region. A silicide formation material is deposited on the substrate including the source/drain region and is heat-treated to form the silicide(199).
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