发明名称 Phase lock loop for frequency synthesizer, has oscillator to produce signals with phase difference based on control voltage, and control unit to control multiplexer to provide predetermined fractions of signal
摘要 The loop has a comparator (2) for producing a control voltage based on a difference between a reference and feedback signal. An oscillator produces signals with a phase difference based on the control voltage. A control unit (14) controls a multiplexer (12) to provide fixed fraction of the signals. A divider (8) receives another signal with an average period of a real fraction of the signals to produce feedback signal.
申请公布号 FR2851095(A1) 申请公布日期 2004.08.13
申请号 FR20030001623 申请日期 2003.02.11
申请人 STMICROELECTRONICS SA 发明人 GHAZALI MOSTAFA;JOUFFRE PIERRE OLIVIER
分类号 H03L7/089;H03L7/099;H03L7/18;(IPC1-7):H03L7/08 主分类号 H03L7/089
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