发明名称 SYNCHRONIZATION DETECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a synchronization detection circuit which stably outputs a vertical synchronizing output signal at a proper timing even in such a state that noise is increased in a vertical synchronizing input signal. SOLUTION: The synchronization detection circuit is provided with; an edge detection part 101 which detects an effective edge of a vertical synchronizing input signal VDin to output a vertical detection signal Se; a video non-display period detection part 106 which detects a video non-display period from the level of an input video signal Sv to output a video non-display period detection signal Sd; a gate part 102 which outputs the vertical detection signal Se as a gate output signal Sg in the case that the on-display period detection signal Sd and a blanking signal Sb are effective; a counter 103 which is reset by the gate output signal Sg to start counting a horizontal synchronous input signal HDin; a blanking period discrimination part 104 which outputs the blanking signal Sb to the gate part in the case that a counted value Sc is within a prescribed range; and a vertical synchronizing signal generation part 105 which outputs a vertical synchronizing output signal VDout in response to reaching a prescribed value of the counted value. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004229053(A) 申请公布日期 2004.08.12
申请号 JP20030015732 申请日期 2003.01.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIMOTORI SHIGERU
分类号 H04N5/04;(IPC1-7):H04N5/04 主分类号 H04N5/04
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