发明名称 |
METHOD FOR FABRICATING BIT LINE OF SEMICONDUCTOR DEVICE USING CVD-Ti LAYER, CVD-TiN LAYER, AND TUNGSTEN LAYER HAVING SPECIFIC RESISTANCE LOWER THAN SPECIFIC RESISTANCE OF TUNGSTEN SILICIDE LAYER |
摘要 |
PURPOSE: A method for fabricating a bit line of a semiconductor device is provided to improve thermal stability in a post-process by forming the bit line with a CVD-Ti layer, a CVD-TiN layer, and a tungsten layer. CONSTITUTION: A lower CVD-Ti layer(11) is formed on a semiconductor substrate(1) by using a PECVD method. A lower CVD-TiN layer is deposited thereon by using a thermal CVD method. An upper CVD-Ti layer(13) is formed thereon and a thermal process is performed. An upper CVD-TiN layer is deposited thereon by using a CVD method. A tungsten layer pattern is formed thereon.
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申请公布号 |
KR100445410(B1) |
申请公布日期 |
2004.08.12 |
申请号 |
KR19970030256 |
申请日期 |
1997.06.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
KIM, JEONG TAE |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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