发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device capable of accelerating an operating speed and reducing a pattern occupying area. <P>SOLUTION: This semiconductor integrated circuit device is provided with flip-flops 31-1 to 31-n where respective data input terminals D and data output terminals Q are cascaded to each other and which respectively have an external input terminal SI and an external output terminal SO. A reset signal RS is inputted from the external input terminal of the flip-flop 31-1 of the first stage, and the reset signal is sequentially transferred from the external output terminal to the flip-flop of the next stage. The reset signal is transferred via a transmission path different from an original transmission path of data DA to reset all of the flip-flops. This nearly eliminates signal delay at a normal operation to accelerate an operating speed. In addition, an OR gate is unnecessary and wiring for transferring the reset signal is also unnecessary so that the pattern occupying area can be reduced. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004227674(A) 申请公布日期 2004.08.12
申请号 JP20030014389 申请日期 2003.01.23
申请人 TOSHIBA CORP 发明人 KINOSHITA KOICHI;URAKAWA YUKIHIRO
分类号 G11C19/00;G01R31/3185;G11C29/10;H01L21/822;H01L27/04;H03K3/037 主分类号 G11C19/00
代理机构 代理人
主权项
地址