| 摘要 |
An Analog-to-Digital (A/D) converter includes signal paths that are responsive to an analog input signal, to generate a multi-bit digital signal. A respective signal path includes a comparator. A synchronizing circuit is responsive to a clock signal and outputs of the comparators, to generate a respective delayed clock signal that is applied to a respective comparator. A respective signal path also includes a respective decoder that is responsive to a respective comparator and to the clock signal.
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