发明名称 Timing generation circuit, display device, and mobile terminal
摘要 A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFF1out to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit (11) generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section (12) operates based on this operating clock and successively outputs shifted pulses S/R1out to S/Rmount from shift registers (121-1) to (121-m). An output pulse generating section (13) generates output pulses SF1out to SFnout based on combinations of the shifted pulses S/R1out to S/Rmount.
申请公布号 US2004155850(A1) 申请公布日期 2004.08.12
申请号 US20040484994 申请日期 2004.01.27
申请人 KIDA YOSHITOSHI;NAKAJIMA YOSHIHARU;MAEKAWA TOSHIKAZU 发明人 KIDA YOSHITOSHI;NAKAJIMA YOSHIHARU;MAEKAWA TOSHIKAZU
分类号 G02F1/13;G02F1/133;G06F1/06;G06F1/16;G06F1/32;G09G3/20;G09G3/36;(IPC1-7):G09G3/36 主分类号 G02F1/13
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