发明名称 Method and apparatus for verification of a gate oxide fuse element
摘要 The present invention relates to a method and circuit for verifying the state of a gated fuse element used with a one-time programmable CMOS memory device. A first expected state is set and a state of a first gate-ox fuse is sensed. The state of the first gate-ox fuse is compared to the first expected state to determine if they are equal, and a first signal is generated. A second expected state is set and a state of a second gate-ox fuse is sensed. The state of the second gate-ox fuse is compared to the second expected state to determine if they are equal, and a second signal is generated. A valid output is generated if both the first and second signals are in a correct state, both signals are high for example.
申请公布号 US2004156224(A1) 申请公布日期 2004.08.12
申请号 US20040757259 申请日期 2004.01.14
申请人 BUER MYRON J.;SMITH DOUGLAS D. 发明人 BUER MYRON J.;SMITH DOUGLAS D.
分类号 G11C17/16;G11C17/18;G11C29/38;(IPC1-7):G11C11/22 主分类号 G11C17/16
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