发明名称 Integrated memory
摘要 An integrated memory can include a memory cell array, which has word lines for the selection of memory cells, bit lines for reading out or writing data signals of the memory cells, and a sense amplifier connected to bit lines of a bit line pair at one end of the bit line pair. In an activated state during a memory access, at least one activatable isolation circuit which is switched into one of the bit line pairs can isolate a part of the bit line pair, which is more remote from the sense amplifier from the sense amplifier. As a result, the effective capacitance of the bit lines can be significantly reduced during the memory access.
申请公布号 US2004156254(A1) 申请公布日期 2004.08.12
申请号 US20040757594 申请日期 2004.01.15
申请人 PROELL MANFRED;SCHROEDER STEPHAN;BENZINGER HERBERT;CAMPENHAUSEN AUREL VON 发明人 PROELL MANFRED;SCHROEDER STEPHAN;BENZINGER HERBERT;CAMPENHAUSEN AUREL VON
分类号 G11C11/4097;(IPC1-7):G11C7/00 主分类号 G11C11/4097
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