发明名称 MRAM ARCHITECTURE FOR LOW POWER CONSUMPTION AND HIGH SELECTIVITY
摘要 The present invention provides a magnetoresistive memory cell (30), comprising a magnetoresistive memory element (31), a first current line (32) and a second current line (33), the first and the second current line (32, 33) crossing each other at a cross­point region but not being in direct contact. According to the invention, a bridging element(34) connects the first and second current lines (32, 33) in the vicinity of the cross-point region. The bridging element (34) is magnetically couplable to the magnetoresistive memory element (31). An advantage of the MRAM architecture according to the present invention is that it allows lower power consumption than prior art devices and high selectivity during writing.The present invention also provides a method of writing a value in a matrix of magnetoresistive memory cells (30) according to the present invention, and a method of manufacturing such magnetoresistive memory cells (30).
申请公布号 WO2004068498(A1) 申请公布日期 2004.08.12
申请号 WO2004IB50022 申请日期 2004.01.14
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;LE PHAN, KIM 发明人 LE PHAN, KIM
分类号 G11C11/15;(IPC1-7):G11C11/15 主分类号 G11C11/15
代理机构 代理人
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